Everything through JTAG. No hardware modifications.
01 - Access
SK-RAFT connects to the device via JTAG
SK-RAFT establishes a connection with the device's JTAG controller, the standard debug interface on every FPGA board. No modifications, no additional hardware. The connection is the entry point to everything inside the device.
02 - Map
SK-RAFT maps everything from your design files.
SK-RAFT parses your design files to build a complete internal model of the device. From this point on, the tool knows exactly where to reach. Whether it is an essential bit in the CRAM or a masked bit in Flip-Flops, BRAMs or URAM. It identifies every addressable region, frame and bit location.
03 - Configure & Run
Define your fault campaign.
SK-RAFT follows the standard fault campaign paradigm. You define what to inject, where, and how many times. Or replay a recorded physical (e.g., radiation) campaign. The tool handles execution, observation, and logging automatically, repeatedly, deterministically.
See SK-RAFT in action.
Book a demo and see the fastest way to perform a reliability evaluation live.
